1. Field of the invention
The present invention relates to a microcomputer incorporating a plurality of oscillation circuits having different oscillation frequencies.
2. Description of the Related Art
A single chip microcomputer (hereafter referred to simply as microcomputer) used in a portable apparatus such as an electronic organizer which incorporates an oscillation circuit to generate low-frequency clocks for a timer in addition to an oscillation circuit to generate high-frequency clock pulses for a main clock, for the purpose of reducing the power consumption.
FIG. 1 is a block diagram showing the configuration of a prior art microcomputer of this type. A microcomputer 1 incorporates an oscillation circuit 2 to generate a high-frequency clock X having a predetermined frequency in a range from 1 to 10 MHz, an oscillation circuit 3 to generate a low-frequency clock Xc having a frequency of 32 kHz, a selector 4 connected to the two oscillation circuits 2, 3 to select either the high-frequency clock X or the low-frequency clock Xc and supply the selected clock to a CPU 5 and peripheral modules 6, 7, the CPU 5, the peripheral modules 6, 7 such as analog/digital converter, ROM, etc., and a timer 8 to keep time by counting the low-frequency clock pulses Xc. The microcomputer 1 is also provided with terminals 1a, 1b for the connection of an oscillator OSC1 to the oscillation circuit 2 and terminals 1c, 1d for the connection of an oscillator OSC2 to the oscillation circuit 3.
FIG. 2 is a block diagram showing the configuration of the selector 4. An initial reset signal IRST generated by the system to reset the microcomputer 1 when it is started up, and a set signal ST generated by a program are inputted to a set terminal S of an RS flip-flop 4b via an OR circuit 4a. A reset signal RST generated by the program is inputted to a reset terminal R of the RS flip-flop 4b. The Q output of the RS flip-flop 4b is inputted to one of input terminals of a first AND circuit 4c, and is inputted to one of input terminals of a second AND circuit 4f via an inverter 4d. Inputted to another input terminal of the first AND circuit 4c is the high-frequency clock X, and inputted to another input terminal of the second AND circuit 4f is the low-frequency clock Xc. Output signals of the first and the second AND circuits 4c, 4f are inputted to two input terminals of an OR circuit 4g, and the OR circuit 4g outputs the high-frequency clock X or the low-frequency clock Xc as a clock CLK to drive the CPU 5 and the peripheral modules 6, 7.
Now the operation of this microcomputer will be described below. To use the microcomputer 1, the oscillator OSC1 is connected between the terminals 1a and 1b, and the oscillator OSC2 is connected between the terminals 1c and 1d. When a power source for the microcomputer 1 is turned on, the system generates an initial reset signal IRST, and the initial reset signal IRST is inputted, via the OR circuit 4a, to the set terminal S of the RS flip-flop 4b to set the RS flip-flop so that the Q output is turned to be "1". Also when the power source is turned on, the oscillation circuits 2, 3 both oscillate so that the high-frequency clock X is outputted from the oscillation circuit 2 and the low-frequency clock Xc is outputted from the oscillation circuit 3, then the high-frequency clock X is inputted to the AND circuit 4c of the selector 4 and the low-frequency clock Xc is inputted to the AND circuit 4f of the selector 4. The low-frequency clock Xc is inputted also to the timer 8 to drive the timer 8.
As the RS flip-flop 4b is set, logic of the AND circuit 4f is no longer fulfilled and logic of the other AND circuit 4c is fulfilled, so that the high-frequency clock X is outputted from the AND circuit 4c. The OR circuit 4g outputs the high-frequency clock X as the clock CLK to the CPU 5 and to the peripheral modules 6, 7, so that the CPU 5 and the peripheral modules 6, 7 are driven by the high-frequency clock X.
When driving the microcomputer 1 by the low-frequency clock Xc, on the other hand, the CPU 5 outputs the reset signal RST by means of the program and feeds it to the reset terminal R of the RS flip-flop 4b. When the reset signal RST is inputted to the reset terminal R, the Q output of the RS flip-flop 4b turns to be "0" so that the RS flip-flop 4b is reset. As the RS flip-flop 4b is reset, logic of the AND circuit 4c of the selector 4 is no longer fulfilled and logic of the AND circuit 4f is fulfilled, so that the low-frequency clock Xc is outputted from the AND circuit 4f. The OR circuit 4g outputs the low-frequency clock Xc as the clock CLK to the CPU 5 and the peripheral modules 6, 7, so that the CPU 5 and the peripheral modules 6, 7 are driven by the low-frequency clock Xc. In this way, when the microcomputer 1 is not driven by the high-frequency clock X, oscillation of the oscillation circuit 2 that generates the high-frequency clock X is stopped thereby to reduce the power consumption. To return from the low-frequency clock Xc to the high-frequency clock X, the set signal ST is outputted by means of the program to set the RS flip-flop 4b.
While a microcomputer of this type in general generates a low-frequency clock to drive a timer, the low-frequency clock can also be used to drive the microcomputer. However, in a microcomputer of the prior art, even when the microcomputer is to be driven by the low-frequency clock only, it is required to first generate a high-frequency clock X then switch the clock to a low-frequency clock. Consequently, an oscillator must be connected also to an oscillation circuit that generates a high-frequency clock even when the microcomputer is to be driven by the low-frequency clock only, thus making the operation troublesome.
There has also been a problem that, because an oscillator unnecessary for driving the microcomputer must be connected merely for the purpose of switching the clock to the low-frequency clock, which costs high for users who want to drive the microcomputer only by the low-frequency clock.